The present invention relates to a semiconductor device and its fabricating technique. More specifically, the present invention relates to a technique effective to be applied to a System in Package; SiP) constructing a system by mounting a memory chip and a microcomputer chip over a wiring substrate.
To improve the mounting density of a semiconductor device, there are provided various stacked packages in which a plurality of semiconductor chips are mounted over a wiring substrate in three dimensions.
Patent Document 1 discloses a stacked package which permits multi functions and high-density mounting by stacking and mounting five semiconductor chips (logic chip, analog high-frequency chip, memory chip, microcomputer chip, and voltage conversion chip) over an insulating substrate. The semiconductor chip as the first layer of the five semiconductor chips stacked over the insulating substrate is connected to electrodes over the insulating substrate by the flip chip method. The semiconductor chips as the second and fourth layers are connected to electrodes over the insulating substrate by the wire bonding method, respectively. The semiconductor chips as the third and fifth layers are connected to the semiconductor chips as the lower layers (the second and fourth layers) by the flip chip method, respectively.    [Patent Document 1]    Japanese Patent Application Laid-Open No.2001-291821